Design xor2 gate using only nand2 gates
Anonymous
Simple solution is to convert the output equation of XOR using De Morgan's laws as A'B + AB' = ((AB')' (A'B)')'. Each A' and B' can be produced by NAND2 by shorting inputs. This method uses 5 gates. Another solution using 4 gates can be found on wikipedia. This one is hard to come up with if you haven't seen it before.
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