Synopsys Interview Question

What is a sensitivity list? Write Verilog code for a mux, counter, and asynchronous reset. Develop a full adder from scratch using truth table, K-Map, and digital circuits. Draw FSM to identify an overlapping pattern - 1010. Draw and gate using NOR. How would swapping 2 numbers get synthesized? Write python code for printing list using for loop. If you haven't completed your task before the deadline, what would you do?