45 mins phone interview: task vs function associative arrays packed vs unpacked scoreboard structures `uvm_do sequencer structure coverage: code vs functional functional cov: module and collector number of automatic bins for an int code coverage metrics uvm_object vs uvm_component concurrent vs immediate assertions 5hrs interview: reg model in uvm adapter and predictor scoreboard structure how to use some of the phases exercise on how to verify a DUT that gets data from 2 sensors list of quick questions on systemverilog how to verify req ack interfaces, also which assertions how to verify in a mixed signal enviroment find errors in given code (like missing "virtual" in parent/child sequences, or missing "automatic" in for loop with fork join_none) optimized way to generate Fibonacci's sequence recursive function to generate a given sequence shortest path algorithm: given starting point and destination point in a 2D matrix, get the shortest path from one to the other, including some non valid coordinates what kind of functional coverage I have done, how I've done scoreboards, some other questions about CV experiences
Design Verification Engineer Interview Questions
1,114 design verification engineer interview questions shared by candidates
In the first round, the interviewer described a memory model consisting of L3 cache and main memory and asked me how will I verify it.
How does polymorphism work in practice in OOP? How is it implemented?
Computer Architecture. OOPs. System Verilog and UVM. Graphics Architecture .
Q1. FIFO depth, given read and write rates for a burst of x writes Q2. a=0; b=0; c=1; #1 a=c; #1 b =a; (Give waveforms) Q3. a<=0; b<=0; c<=1; #1 a<=c; #1 b< =a; (Give waveforms) Q4. a=0; b=0; c=1; a= #1 c; b=#1 a; (Give waveforms) Q5. a<=0; b<=0; c<=1; a<= #1 c; b<=#1 a; (Give waveforms) Q6. You have incoming bit stream. You can't store them. You get a new bit at every clock edge, find modulo 5 of the updated number everytime. Eg, if bitstream is 10111, you find modulo of 1, then 10, then 101 and so on..
Describes one of your projects
Write TB for one of the projects from past experience . Describe its features and implement DUT interface connections and build TB on whiteboard .
DV related, protocols, sv, uvm, axi,abp
Cache Coherency, UVM and TLM related, SV concepts, Past projects.
They asked about uvm fundamentals. They were looking for strong uvm experience and asked me to write code for scoreboard, monitor and asked about how to connect them.
Viewing 901 - 910 interview questions