Virtual interface, Functional coverage, TB
Design Verification Interview Questions
1,114 design verification interview questions shared by candidates
Constraints, p_sequencer, m_sequencer, tb flow, agent
Questions on pipelining
What is stuck at fault, transition fault, bridging fault?
How would you verify a that a basic flip-flop works?
Questions were from resume. How will you verify a 32 bit ALU unit having 2 inputs is working fine for all 2^32 * 2^32 combinations?
Describe your previous work experience
State machines, VHDL, basic logic and design.
Out of order processor, importance ILP (and it's advantages), Digital design (realizing basic gates with a MUX)
Technical Screening: Q: I was asked about basic programming questions like Leet Code (easy) but mostly based on array, hash-maps, strings and also resume discussion Full-Panel: Q: SystemVerilog constraints, fork-join, mailbox and semaphores based questions Q: Was asked to write scoreboard for a Asynchronous FIFO Q: Monitor and scoreboard code for an AXI write transaction (project based) Q: Resume based discussions Q: Some basic programming problems in language of preference
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