Implementation of moving average filter
Digital Design Engineer Interview Questions
820 digital design engineer interview questions shared by candidates
Design a Sequence Detector for 1001.
What makes you stand out from others
Python questions, how would i do assertion testing
$monitor and $display are used to?
What are Blocking and non-blocking in Verilog?
They asked about the impulse , pulse, step response of RC filters and basics of RLC circuits. Then they asked about the basics of CMOS inverter how it is constructed and the advantages of it. Finally they ended the interview by asking how to convert a 0-15 counter to 0-9 counter.
Create a register in SystemVerilog
They will ask basics of analog, digital, biasing, RLC circuit, gain, bandwidth etc. You should be clear with all the fundamentals.
Shift Register Problem, CMOS Theory, Verilog Questions
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