ASIC Design Floq
Physical Design Engineer Interview Questions
711 physical design engineer interview questions shared by candidates
what were the problems you faced during design
Power leakage issues, timing definitions of flip-flops, maximum leakage in NAND,
Experience in RTL, Synthesis, Timing Analysis, Placement and Routing
1) If combinational loop is present in sanity checks, how would you clear it? 2)what false path and multi cycle path ?
Describe briefly about your expertise in Digital electronics?
Asic flow, PD inputs, and fundamentals
Static timing analysis questions
I didn't expect the question on make file since I have use it before
When it comes to 2nd round , They asked me about the Flow of PD... And what are the inputs required and what checks have to be done at each and every stage..... Mainly they asked from the resume only.... So u have to be prepare ur resume based on your knowledge... When it comes to 3rd round.... I am ECE fresher (2024 pass out)... So they completely focussed on the Electronic circuits like Op-Amp, Amplifier Circuit,Integrator , Step - down transformer
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