Intel Corporation CPU Design Engineer (MS) interview questions

They found the really old version of my resume on their database from back when I'd applied for an intern position. The hour-long phone interview consisted of the standard questions for a EE - inverter transfer curve and the effect of PMOS:NMOS size ratio on the shape, NAND, NOR gate design, clock skew causes and remedies, effect of parasitic capacitances on wires, state machines and state minimazation - K-maps etc. Was also asked to describe class projects, previous internships, and even some puzzles: find the fake (heavier/lighter) ball from 15 using minimum number of measurements on a weighing balance. Always good to read up on recent company products/news to ask intelligent questions about the position, challenges etc. On-site interview only a week later (that's quicker than usual). My prep concentrated mainly on stuff I studied (and promptly forgot) during my undergrad - digital design, excitation table, computer architecture, c+vhdl+perl programming etc. Breezed through my master's VLSI material just before the interview, turns out I didn't need to revise most of it. Having a contact inside the group I interviewed for and classmates who joined Intel recently helped a lot. The personal was 5 rounds with different people, of which I found the physical layout/analog design questions the easiest. will complete later.