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      FPGA Hardware Engineer Interview

      Sep 4, 2017
      Anonymous Interview Candidate
      San Jose, CA
      No offer
      Neutral experience
      Average interview

      Application

      I applied in-person. I interviewed at WD (San Jose, CA) in Aug 2017

      Interview

      Got the call through a conference. It is basically a logic optimization company looking to produce high performance logic on FPGAs. It was a one hour on site interview. It was fully technical. No behavioral questions. Questions were asked based on logic I have used in my projects in resume to get high throughput. It was a very interactive session. 4 on 1 interview

      Interview questions [1]

      Question 1

      Describe how OpenCL in VHDL was better than OpenCL on FPGA
      1 Answer