single stage amplifiers and current mirrors
Analog Design Engineer Interview Questions
789 analog design engineer interview questions shared by candidates
isolation strategy in SOCs.
Explain how the mismatch in threshold voltages of the differential pair input transistors results in offset voltage.
What is mux , basic level
pole-zero doublet in the current mirror
strong mixed signal knowledge
What kind of projects I did in school?
verilog to write a D-flipflop and explain the function for verilog
Nothing too difficult, I was mostly asked about group projects I've worked on and a few questions regarding Smith Charts and inductors.
Describe yourself.
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