setup and hold time -implementing and gate using mux
Asic Design Engineer Interview Questions
811 asic design engineer interview questions shared by candidates
setup time hold time, implement and gate using mux 2-1 and asynchronous fifo implementation and MIPS data path
How do you access a register and confirm it is 12 bit or not?
7. Dual port RAM operation (if read and write req to the same location at a time?)
6. STA concepts
ASIC and PNR flow
What was the biggest challenge you've met during your previous work?
projects, basic asic questions
Design a sequencer that can detect a certain sequence of binary values.
design async-fifo and sync-fifo in circuit level
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