Explain POCV coefficient based calculation for an actual timing report.
Asic Design Engineer Interview Questions
811 asic design engineer interview questions shared by candidates
Question asked: SV -> function can take fork_join?y/n ->to find the bit to represent 4069 = 2^(x) or log 2 base (32) ->Malloc() ->write a integer queue : rand int q[$]; -> task and functions UVM: Sequencer- Driver connection phasing name 3 base class related question
Introduce your education background
electronics the technical questions like find the output of flip-flops find the output at a specific clock cycle combinations of flip flops and mux simplifications of gates transmission gate problem basic electronics like temperature were given flipflops and interview time played a dominant role in the first round
VLSI, Device Physics, Cadence, Verilog and C Programming.
State machine, gate level design
Explain Setup and hold for a latch.
transistor sizing for a NAND gate
Design a FIFO hardware
False paths and Multiple cycle path examples.
Viewing 501 - 510 interview questions