Questions on constraints and assertions
Asic Engineer Interview Questions
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Questions regarding library creating and area of the cells in the library
Designing multiple Gates or some basic logic using Multiplexers. Draw state Diagram & verilog code for 1010 sequence detector.
Antenna Effect, latch up
Explain about the AXI write process with signal descriptions
Do you understand timing constraints. Asked a few questions about them.
Basic FIFO and CDC questions
Question asked: SV -> function can take fork_join?y/n ->to find the bit to represent 4069 = 2^(x) or log 2 base (32) ->Malloc() ->write a integer queue : rand int q[$]; -> task and functions UVM: Sequencer- Driver connection phasing name 3 base class related question
Explain POCV coefficient based calculation for an actual timing report.
Gave a standard fifo design and told me to explain how i'll write testbench for that
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