design a trafffic light controller
Asic Engineer Interview Questions
1,319 asic engineer interview questions shared by candidates
Qhat is your strength? An example of the time that you take initiative? What is your weakness?
Design basic logic gates (AND, XOR) using a 2to1 mux. Write a module which will take clk as an input and output a clk divided by 3. Important to note that generated clock needs to be an output of the Flop.
RTL coding related questions such as writing a simple FSM.
Visually Identify between combinational and squential elements
How can I estimate a new IP complexity and area without having any specific details yet?
Write a C++ function that returns the second largest number in an array
Write a function in C that reverses a linked list
Palindrome in C
Sequence FSM detector, with overlapping sequences
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