Setup and Hold time constraints
Asic Engineer Interview Questions
1,319 asic engineer interview questions shared by candidates
Counters, Flipflops, Latches, 32:8 Bit converter, State machine design, VHDL - Process statement, seuential logic, combo logic implementation, Functional coverage, code coverage - which coverage is crtitcal for verification sign-off and why ? , Different coding styles for FSMs, DV Environment diagram and explanation of last project in last company,.
FSM problem. i had to write the state machime to find if the number was divisible by 3 or not. sequence detector for divisible by 3 numbers in cummulative manner.
Explain to us your thesis work? Designing the system from Top to Bottom?
questions are normal
what is a asic design?
technical- counter, data types (enum, struct), blocking and non blocking assignments. Aptitude- mixture and allegation, ratio and proportion, distance and speed, percentage, population based question.
Tell me about yourself Why this company?
How do you manage contrasts with people in the company?
What is you expected CTC.
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