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265 design engineering interview questions shared by candidates

Q1: You have an infinite train of triangular pulses in time domain. How will it look in frequency domain? Q2: What do you understand by an AWGN channel? Q3: What would you prefer, SNR or EbNo, on the x-axis for a sensitivity (PER/BER) plot? Q4: Discussion on projects on Resume.
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Design Engineering Intern

Interviewed at Silicon Labs

4.1★
Nov 28, 2023

Q1: You have an infinite train of triangular pulses in time domain. How will it look in frequency domain? Q2: What do you understand by an AWGN channel? Q3: What would you prefer, SNR or EbNo, on the x-axis for a sensitivity (PER/BER) plot? Q4: Discussion on projects on Resume.

Draw the NAND implementation of some digital logic. Draw and explain the CMOS implementation of a NAND gate. A series of questions with regards to a CMOS inverter (switching, what comes after a CMOS inverter, explain how a CMOS invetering works, etc.) Basic Linux commands
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Physical Design Engineering Intern

Interviewed at AMD

4★
Dec 22, 2016

Draw the NAND implementation of some digital logic. Draw and explain the CMOS implementation of a NAND gate. A series of questions with regards to a CMOS inverter (switching, what comes after a CMOS inverter, explain how a CMOS invetering works, etc.) Basic Linux commands

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