Digital Design Engineer Interview Questions

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Draw the cross section of an inverter and describe the parasitics. What could go badly when applying a voltage lower than vdd to the gate of an inverter? Draw an OR schematic at the MOSFET level. Solve a boolean logic function and draw the truth table.
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Digital Design Engineer

Interviewed at Microchip Technology

3.6
Jun 27, 2022

Draw the cross section of an inverter and describe the parasitics. What could go badly when applying a voltage lower than vdd to the gate of an inverter? Draw an OR schematic at the MOSFET level. Solve a boolean logic function and draw the truth table.

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