what are muxes output of rc circuits
Rtl Design Engineer Interview Questions
212 rtl design engineer interview questions shared by candidates
Counters , FSM, Project based questions, CDC, lint, protocol
Describe ways to reduce power on an ASIC
What are your weaknesses and strengths?
building a circular array with lock to ensure thread safe
Script question to count words in an file. You can write in perl or python
I was given a C++ implementation of some function, and asked how I would implement it in hardware
Design a Reorder Buffer on the Register Transfer Level.
Q. Tell me about yourself Q. Built nand gate using 2*1 mux Q. Why mux not called a universal gate and what are the universal gate Q what is setup and hold time Q when setup and hold violation occurs Q. What is pipelining and what is it's drawback Q. On what factors the stage of pipeline depends Q what is the latch up Q what is the difference between latch and flip flop
Q: What Are Design Rule Check (drc) And Layout Vs Schematic (lvs) ? Q: What Is Antenna Effect? Q: What Are Steps Involved In Semiconductor Device Fabrication? Q: What Is Clock Distribution Network? Q: What Is Clock Gating? Q: What Physical Timing Closure? Q: What Is Stuck-at Fault?
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