Q: Tell me about yourself. Q: 10 in binary form
Soc Design Engineer Interview Questions
114 soc design engineer interview questions shared by candidates
What do you know about the OVM and UVM. Elaborate more the different.
Computer Architecture, Logic design, validation, software, behavioral.
Solving k-maps, coding latch vs flip flop in VHDL/verilog, problems in placement and routing, how to resolve layout issues like drc's
Sum of three numbers in an array
Describe an algorithm to sell/buy stock at maximum profit.
Draw a circuit/ state flow diagram to detect a bit sequence.
Explain setup time, hold time, etc. with diagrams.
Static Timing Analysis and its tools used
1. Constraint coding for specific scenarios. 2. UVm phasing
Viewing 41 - 50 interview questions
See Interview Questions for Similar Jobs
Soc Physical Design EngineerAsic EngineerVlsi EngineerHardware Asic Design EngineerAsic Design Verification EngineerAsic Physical Design EngineerVlsi Design EngineerElectrical Hdwr Engineer IFpga Design EngineerAsic Design EngineerFirmware EngineerAsic Verification EngineerVlsi Cad Tool Support EngineerPhysical Design EngineerCpu Design EngineerFpga Hardware Design EngineerFpga EngineerSenior Vlsi Design Engineer