What happens when you have a diff pair with a current mirror load on top and a tail current source on the bottom, and you sweep one of the diff pairs gate voltage (VX) from 0 to VDD while holding the other's gate voltage at VDD/2. Plot the two branch currents vs the gate voltage.
Various- and the one most important one for them “would you relocate to Cheltenham from North wales” lmfao
Design an Omni Wheel with some given specifications
The last was HR round. The HR asked me about my strengths and weaknesses. He also asked me if I had any problem moving out of my hometown. But the crucial question was..with your academics why aren't you pursuing higher study?
How would you verify a Verilog design?
Develop a FIFO with hardware and logic gates.
Why Product Design?
About changing the job
Difference between latch and ff, diff b/n system verilog and verilog, difference between blocking and non blocking,
How would you handle it if you met with a client and they asked you a question that you did not know the answer.
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