basic question about UVM and some verilog coding
Verification Interview Questions
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describe a situation where I applied low-power design techniques to improve chip performance.
1. ATPG design basics 2. BISTs modes of work vs defects. 3. CDC testing
Given a truth table, draw the corresponding diagram. I was also asked questions on level triggered/edge triggered (which one is safer...stuff like that). Code the solution in Verilog/VHDL.
Given a black box circuit and its truth table, use it to implement a NOT gate
logic design flipflops, vlsi - setup and hold time. CMOS. Projects
What is the physical significance of energy stored in a capacitor? Need of CMOS and what is it's role in VLSI and what is the exact thing for which the VLSI Industry is working for?
Introduce yourself and why have you applied for this job role?
How would your former supervisor describe you and how you work?
write a round robin arbiter in Verilog
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