The one thing that the interviewee asked was to verify a block of test code, that was in Verilog. He just shown me a digital signal, and , then asked me to verify that waveform, according to the design. For this case, I need to write a verilog testbench.
Fifo related questions and logics
Some aptitude ques like cloak speed time and some from geeks for geek
Why do you want to work here?
What is a ROB used for in a CPU pipeline?
do you have an experience in customer service ?
Name one time you had to have a difficult conversation and how you handled it.
In UVM, what are the phases and their property’s?
What experiences qualify you for this role?
Asked me to describe the role.
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