question about Logic design FIFO related questions were asked: what requirements will be needed from designer, what will be the test points, coverage points, assertion checks Regarding Technical skills I don't have any difficulties and regarding job location to change from Bangalore can be difficult Few puzzles and Projects in my resume
1. In a certain protocol why the ready signal is inout instead of out? 2. About the refresh in DDR2 3. FSM 4. System Verilog, Verilog, C, Perl, (also questions about OOP) 5. Bit operation
how does fork-join,join_any etc work
1. reverse linked list 2. calculate tree depth. 3. build a chip for sorting 4 elements by using a chip of sorting 2 elemnts.
Design a system to test a memory device integrity over time.
Ques. Introduction and previous work Ques. 5 stage pipeline design and verification Ques. branch predictor Ques. system verilog Ques. Optimize program for pair of numbers with fixed sum value.
Are you open to relocation
Program for counting the number of ones in a 32 bit number Explain FIFO Design Program to reverse all the bits of a 32 bit number
What is the circuit of a full adder?
Mostly asked me about my experiences and how can I help the organization.
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