write a verilog program for a counter.
Vlsi Design Engineer Interview Questions
120 vlsi design engineer interview questions shared by candidates
cpu and ram memory connect with 4 cables: write, read, adders, data. check if it connect right.
1. Counter Design 2. Flipflops 3. Sequence Detectors 4. Verilog program for RAM
1.Digital Electronics:- Basic to advance 2.Verilog:- Basic fundamentals and some code related to combinational and sequential circuits. 3.System Verilog:- Basic fundamentals and difference between verilog and system verilog
What is the minimum number of flip-flops required to design a modulo-12 counter?
Analog layout Flow Floorplan/Placement /Routing/EM.IR/STD CELLS/Matching/BJT/CMOS.DIODE /CAP/RES .
explain about your project
difference between malloc and calloc
what happens in synthesis process?what initially vivado tool is doing during synthesis process?write a verilog code for synchronous d flipflop?
6: flip-flops timing diagrams.
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