FPGA Engineer Intern applicants have rated the interview process at IMC Trading with 3 out of 5 (where 5 is the highest level of difficulty) and assessed their interview experience as 100% positive. To compare, the company-average is 52.6% positive. This is according to Glassdoor user ratings.
Candidates applying for FPGA Engineer Intern roles take an average of 90 days to get hired, when considering 1 user submitted interviews for this role. To compare, the hiring process at IMC Trading overall takes an average of 23 days.
Common stages of the interview process at IMC Trading as a FPGA Engineer Intern according to 1 Glassdoor interviews include:
One on one interview: 50%
Skills test: 50%
Here are the most commonly searched roles for interview reports -
First was a take home Verilog test to create a module (I don't remember the specific details), one call to go over the solution to explain your reasoning, also had to go over an extension, lastly a coding interview.
Interview questions [1]
Question 1
Derive this data compression technique (given hints on how to do this)
I applied online. The process took 3 months. I interviewed at IMC Trading (Chicago, IL) in Oct 2024
Interview
Pretty good, recruiters are pretty responsive as well when I had any question. They got back to me after my OA pretty quickly, but took about two months to give me an OA after resume drop. I’m doing the actual interview soon.