Digital circuit, state machine, timing
Asic Design Engineer Interview Questions
811 asic design engineer interview questions shared by candidates
Process and Improvements - Examples of how you've improved processes - Thoughts on how current core processes could be enhanced - Creative and critical thinking abilities Physical Design, Power and Timing - Power optimization strategies - Timing challenges in high-frequency designs - Understanding RTL vs. PD in cores and SoC PD Flow and Fundamentals - Synthesis Design Compiler - Backend flow: DRC, LVS - Verilog (read and edit) - Primetime, STA (Static Timing Analysis) - High-speed designs (3GHz+) Structured Problem Solving - Real-world examples of problem-solving from past experience - On-the-spot problem-solving scenarios - Demonstrating adaptability and logical thinking Also topics about CTS including ICG cloning
Can't say. Technical questions have to do with basic ASIC design.
Elaborate on your projects / work exp.
basic digital question, rtl coding of traffic light controller
1. How does the spectrum change when a signal is downsampled. Different versions of it. 2. Explain setup, hold, clock jitter etc
Complete interview was based on Verilog and Digital Electronics There were three interview rounds one technical,one managerial(which people say ) (especially covering the resume)and third HR round
Solve timing diagram with some simple combinational circuits and flipflops.
Design a adder, count on both edge, generate Fabinachio
Basic coding algorithm like sorting of arrays. PERL scripting basics.
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