nor gate with one input 0 and one input C what is its output status
Asic Design Engineer Interview Questions
810 asic design engineer interview questions shared by candidates
Write a verilog code to swap data with and without a temp register.
explain what is the best time (morning, afternoon or night) and place (beach, valley etc) could a hot-air balloon fly highest? How is the structure of a concert theater ?
fifi design
Design clock switchers without any glitch.
Calculate the number of logic 1's in a given input using combinational logic only. And some basic logic based questions
Design a hardware to detect how many bits are 1 with only combination logic design
Questions 1. Sequence detector for 1001 overlapping sequence (fsm design + verilog code) 2. Basic STA questions on setup and hold time like if in a silicon a path is failing, what would be the first step that you will do to check it is a setup failure.
There are 8 bits inputs ,only use full adder to detect how many logic 1's
Have 16 16bit pattern. Find the secong largest one using pure combinational logic.
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