DFT, Basic vlsi
Asic Design Engineer Interview Questions
811 asic design engineer interview questions shared by candidates
Lot of Timing Questions and Digital Design Questions
Detailed explanation of timing analysis between two flops, setup, hold, and exact calculations (not numerical)
Questions about clock domain conversions were very interesting.
Tell me about your projects, and what was your deisgn experience
what is congestion and what are the causes
Do you known where the bitstream goes in order to program an FPGA (Describe the FPGA flow and what specifically the bitstream does)
Describe this certain project that you had worked on, what were the requriementes, outcome, etc
What is handshake mechanism in uvm and explain how to override
1. What was the maximum clock frequency of your design, how did you determine it (in reference to a project on my resume)?
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