STA algorithms.
Asic Design Engineer Interview Questions
810 asic design engineer interview questions shared by candidates
Puzzles and a lot of RTL coding.
Design a Verilog module that generates the perfect squares of natural numbers starting from 4.
Describe how you solved a problem on a project
Explain ASIC Design Flow
Using 3 registers and two two-bit full adders, how to count to 9 given that one clock cycle is only enough the delay of a full adder.
Number of bits representation for a given math function
Write the equation for set-up time for the circuit described. Give the hold equation for the same
Design a state machine for sequence detection.
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