Lots of questions on OoO processor and Caches Learn more than what is given in your coursework
Cpu Design Engineer Interview Questions
85 cpu design engineer interview questions shared by candidates
Basic Concepts from Digital Design, Verilog and Static Timing Analysis were asked.
Describe virtual memory and the Memory Management Unit?
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Difference between heap and stack in cpp
Write the function given a transistor level diagram and identify the faults.
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Pipelinning Hazards
What is negative hold time?
Questions related to pipelining, hazards, in-order processor, out of order processor, Register renaming, branch prediction, caches and virtual memory
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