Implement Coverage for given scenario
Design Verification Engineer Interview Questions
1,113 design verification engineer interview questions shared by candidates
how to balance the pipeline stage to achieve any specific time period?
A question about managing branching methodology when dealing with IP cores.
Compare Superscalar and VLIW processors.
How do u rate in RTRT and ADA
Design scoreboard to compare dut and reference model.
UVM , system verilog and scoreboars related questions.
Design a Flip Flop using transistors.
Design a Cache, 32KB, 40 bit address, 64 Byte cache line, 4 way associative. How many bits are required to implement true LRU?
2nd phone interview: different methods for floating point multiplication.
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