question on packet transfer inside of test bench from generator to driver... (system verilog concepts)
Design Verification Engineer Interview Questions
1,114 design verification engineer interview questions shared by candidates
When in your previous work did you wish you behaved differently?
There were 4 rounds - 3 technical and 1 HR.
Qu’est ce qu’il y a dans un processeur?
Pipeline , caches, TLB , virtual memory
Why is program block needed. What is clocking block. Program for clock without always. Differnce between always_combo and always.
If you have a DC power supply in series with a 1k resistor and a 6k resistor, give the equation that described the voltage across the 6k resistor. Switch the 6k resistor for an inductor, what is the voltage across the inductor? Switch the inductor for a capacitor, what is the voltage across the 1k resistor? Change de the 1k resistor for a cap identical to the other one, what is the voltage drop across each cap? Change one of the caps to make it double the capacity of the other one, what is the voltage drop across each cap?
What did you do in your last job?
Find the depth of a binary tree
what is blocking and non blocking?
Viewing 681 - 690 interview questions