All basic pipelining, hazards and their types, prevention techninques.
Design Verification Engineer Interview Questions
1,114 design verification engineer interview questions shared by candidates
What's the different between CPU and microcontroller
Abstarct class vs Interface, inheritance,polymorphism…..etc Observer and Factory DP in details. Log file output analysis. Behavioural questions. Giving basic and simple designs with some specifications and elaborate a strategy to verify it.
what is function overriding and overloading
Implement a random number generator in c++ and reduce the complexity, asked me to write the code
Verify a packet processing DUT where packets coming in have a certain priority.
What is the difference between blocking and non-blocking assignments?
I was asked to write system verilog constraints for a variety of random stimulus needs.
Questions on C++, Perl, System Verilog.
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