Give examples of how loops work in ARM?
Design Verification Engineer Interview Questions
1,114 design verification engineer interview questions shared by candidates
What would you use a modport for in SystemVerilog?
Walk me through how you would verify a complex digital design with multiple clock domains.
Make an AND gate from a 2-to-1 mux and make a k-map for that set-up, write code (any language) to arrange a N-sized list of numbers in ascending or descending order, what is set time, hold time, and metastability, divide a clock signal by three
Questions related to Pipelining, Interrupt Handling.
Write constraints for unique elements in an array. Write assertions for different scenarios of AXI protocol. Basics of UVM including testbench components, phases, TLM ports.
Questions on protocols like API, AXI, AHB, API, UART.
soc - c handshake mechanism/ how c testcase is getting completed
Basics of Digital Electronics and Verilog
2 lists which are connected. find the joint element
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