There are 2 light switches connected in parallel to a single light bulb. This means that each light switch can turn on or off the light bulb depending on its current state. Describe what logic gate for this configuration and why.
Asic Design Engineer Interview Questions
810 asic design engineer interview questions shared by candidates
Clock divide by 3
ASIC Design Flow steps
What should be the size of the buffer in a FIFO receiving data packets at a certain rate?
How do you deal with the different frequencies and voltages between voltage islands that are controlled by dinamic voltage and freq scaling.
FSM of sequence detector 01101
Design an FSM (explain Mealy and Moore machines/ differences between them)
1. Swap function: difference between pass by value and pass by reference 2. Fibonacci series. Two implementation: for loop and recursive. 3. The usage of constant, constant functions 4. Detect sequence pattern in FSM.
Asked to design a FSM
All the interviewers are Indians and were really nice. I had a really good conversation each interview is about an hour. Everyone had a set of questions prepared and asking me to solve. 1. Full SV - fork join_none, virutal functions, $cast, static variable, Cache size - direct mapping, MESI FSM, constarints, parity check - post randomize 2. STA - hold violations, max freq, FIFO depth, metasibility 3. DUT - muti master muti slave bridge verification - draw the env and testcases, AXI signals 4. UVM - phases, AXI why not APB?, AXI lite vs. AXI 3.0, Driver code, coverage class and do cross coverage. 5. HR -> about team work, resources you used in a project, set back you faced. Explained most employee benefits, applying for H1B and green card, etc
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