APB and AXI protocol explation with all signals.
Asic Design Verification Engineer Interview Questions
105 asic design verification engineer interview questions shared by candidates
Draw the circuit base on the coding provided
Abstarct class vs Interface, inheritance,polymorphism…..etc Observer and Factory DP in details. Log file output analysis. Behavioural questions. Giving basic and simple designs with some specifications and elaborate a strategy to verify it.
Basics of UVM and SV
what is a asic design?
technical- counter, data types (enum, struct), blocking and non blocking assignments. Aptitude- mixture and allegation, ratio and proportion, distance and speed, percentage, population based question.
Tell me about yourself.
Regarding testbench in sv and uvm
I was asked to give a brief on PCIe protocol
Array, system verilog,uvm, mailbox Queue fifo configdb etc
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