Q: Can you explain the difference between blocking and non-blocking assignments in SystemVerilog? Q: How would you verify a FIFO design? Q: What is a virtual interface and how do you use it in UVM? Q: How do you handle back-to-back transactions in a UVM sequence? Q: How do you debug a failing assertion in simulation?
what is mailbox why we don't use queue instead of mailbox. what is polymorphism and their uses. what is diff bw trsanction and transfer wrt axi.
1) Questions were all scenario based and practical .
1) What is the difference between virtual and pure virtual functions explain them. 2) What is constructor and destructor 3) Can we override constructor 4) Pseudo code or algorithm to distinguish between even and odd numbers in range of numbers 5)One question on angle between minutes hand and seconds hand something like how much distance traveled (Never expected) 6) What is tuple in python 7) Difference between C++ and Python Some other easy questions.... (Don't remember exactly). I answered most of them but received reject after 2 days.
how to write uvm top
This will be based on your resume they will tell you on which topic they are going to ask when scheduling the interview
Polymorphism, config db.
coding a uvm_driver and interface based on a clk, req, ack, signal set.
How many blocks are in an N way set associate cache?
Questions on constraints and assertions
Viewing 621 - 630 interview questions